Experimental and Numerical Investigation Into the Plasma Treatment and Chip Delamination in Semiconductor Packaging

Delamination between the molding compound and the die surface is a common failure pattern in the semiconductor package industry. Plasma treatment is a standard process to clean and activate the die surface to enhance the bonding force between the molding compound and the die surface in the packing procedure. However, the unexpected delamination still happens and results in a huge commercial loss for the packaged products. This study adopts experimental and numerical approaches to systematically investigate the delamination risk for plasma treatment before compound molding. A vacuum chamber is established to visualize the plasma distribution and the oxidation condition of the lead frames placed on the metal and the insulator rails. Moreover, a numerical calculation is used to systematically predict the plasma distribution over the lead frame and die surface. Results show that the lead frame placed on the metal rail exhibited a higher electric field gradient than that placed on the insulation rail. Moreover, the copper lead frame placed on the insulation rail exhibits a lower electric field gradient and less metal oxidation on the die surface. The delamination risk for semiconductor packaging can be systematically predicted and efficiently reduced before the packing process with the results obtained in the present study.