A Comparative Study on Design and Characterization of Single Gate and Double Gate Multi-Channel Junctionless Nanowire Transistors

In this work, we have studied the electrical performances and short channel behavior of n-type multi-channel junctionless nanowire transistors (JLNTs) with two different gate structures (single gate and double gate), by employing numerical three-dimensional simulations through CVT (lambardi) model. We have analyzed both the devices to investigate various characteristics like Drain Current (ID), Threshold Voltage (Vth), Subthreshold Swing (SS), Drain Induced Barrier Lowering (DIBL) and on state and off state current ratio (ION/IOFF) as functions of channel length (Lg) and oxide thickness (Tox). In essence, better performance is reported for double gate JLNTs with higher ION/IOFF ratio over channel length variation. Moreover short channel effects (SCEs) like SS and DIBL have also been proved to be better in double gate JLNTs than single gate JLNTs ensuring faster and better switching application. Significant improvement in the ION/IOFF ratio is also reported in our study upon using gate material of higher work-function (φ).