A Low Power 60 GHz 6 V CMOS Peak Detector

A low-power, compact mm-Wave voltage peak detector capable to withstand input voltage levels up to 6 V is presented. The circuit is realized in a 22 nm fully depleted silicon on insulator (FD-SOI) CMOS technology and employs 1.8 V I/O transistors and use a clamping scheme to increase its operating voltage range, both of which are novel approaches. The circuit operation is verified up to 67 GHz. A 3-dB amplitude demodulation bandwidth of 10 MHz at a 61.25 GHz carrier frequency was measured while the detector consumed only 6 µW power from a supply voltage of 1.8 V. The proposed peak detector has an active area of 35 µm × 40 µm including the bypass and output capacitors completely below the patterned ground plane of a transmission line, and thus it does not consume any additional silicon area.