Highly linear 100 MHz CMOS programmable gain amplifiers

Digitally programmable gain amplifiers (PGAs) are designed by using the current-mode technique to achieve constant bandwidth and high linearity. A new current amplifier and MOS switch arrays are proposed to realize the PGAs. Simulation results show that, implemented in a standard 0.35 /spl mu/m CMOS technology, the amplifier exhibits a total harmonic distortion of lower than -60 dB for an 80 MHz differential output with 1.6 V peak-to-peak voltage. Dissipating 22 mW from a 3.3 V supply, a single-stage PGA can have a voltage gain varying from 0 dB to 20 dB while maintaining a constant bandwidth of 100 MHz driving 2 pF capacitive loads.