Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancement

Negative conductance voltage gain enhancement techniques which substantially increases the DC gain of an operational amplifier without degrading speed are discussed. Three fully differential CMOS op amps using the negative conductance gain enhancement technique are presented. Simulations show that for a 0.35 /spl mu/m CMOS technology with a power supply of 3 V, a DC gain of more than 94 dB is achievable with the proposed amplifiers. Settling measurements with a feedback factor of /spl beta/= 1/2 show fast settling behavior and a settling accuracy of better than 0.1% for a 1.2 V input step.