Design of High Performance & Low-power H-Tree using Multi Threshold Split-IO Buffers

Optimization of static power consumption in CMOS circuits without degrading the propagation delay and performance of the circuit is a difficult challenge in the race to develop low-power high-performance systems. A new split input-output (SPLIT IO) buffer is developed using high threshold and low threshold transistors. High threshold transistor reduces the steady-state current flowing from power supply to the ground and low threshold transistor ensures faster switching reducing the propagation delay. Novel SPLIT IO Buffers are used to build a two-level H Tree clock distribution network. A single unit of SPLIT IO buffer's delay is reduced by 34.9% and H Tree's delay-built using the SPLIT IO buffer is reduced by 19.5% to 24%. Static power consumption of a single unit of SPLIT IO Buffer is reduced by 55% and the H Tree built using SPLIT IO Buffer is reduced by 52.24%.