An Area-Efficient Decimation Filter on High Resolution Sigma Delta A/D Converter for Biomedical Signal Processing

This paper presents an area-efficient decimation filter architecture in the biomedical signal capturing system, where the high-resolution sigma-delta analog-to-digital converters (ADC) are mostly concerned. The decimation filter design should ensure the flatness in band and curtail the filter area. The proposed filter adopts three stage architecture. A cascaded integrator comb (CIC) decimation filter with high decimation factor is designed as the first stage, which adopts the recursive structure. The next two stages FIR filter coefficients are all determined by the equal-ripple approximation algorithm to reduce in-band ripple at lower frequency. By using the serial structure to realize the FIR filter, the number of multipliers just need 2. Its realization occupies only 0.92mm² in a 0.18μm CMOS technology. According to the post-layout simulation, the cascade structure filter achieves 23.39 bits output effective number of bits (ENOB) with 256 over sampling rate (OSR).