A 5 GHz 0.5 V Hybrid Class-B/F−1 CMOS Oscillator With −147 dBc/Hz Phase Noise at 10 MHz Offset Using Body-Biased 22 nm FDSOI

This work presents a self-biased 5 GHz hybrid class-B/F-1 oscillator for low phase noise and robust startup. The design exploits the concurrent conduction of nMOS and pMOS, when placed on differential sides, to form a differential-mode (DM) high-quality-factor second-harmonic resonator for low phase noise. The same resonator is shared between the main core (class-F-1) and the startup core (class-B), to allow phase noise reduction. The hybrid CMOS oscillator is fabricated in 22 nm fully depleted silicon-on-insulator (FDSOI) using thin-oxide-only devices, operated from 0.5 V supply, and achieves a phase noise <; -147 dBc/Hz at 10 MHz offset across 11% tuning range. The peak figure of merit (FoM) is 190 dBc/Hz, and the supply frequency pushing ranges from 20-44 MHz/V, whereas the power consumption is from 15 to 18 mW. To the authors' knowledge, the hybrid class-B/F-1 oscillator delivers the lowest phase noise using a 0.5 V supply at 5 GHz.