Discrete Time Analysis of Phase Detector Linear Range Extension in Sub-Sampling PLL

The discrete time analysis of the phase detector linear range extension in the first and the second order sub-sampling phase-locked loop (SSPLL) is presented. The aim is to understand how much the stability and the pull-in range are affected by the linear range of the sub-sampled phase detector. To change the linear range, sinusoidal, triangular and sawtooth signals are used as the voltage-controlled oscillator (VCO) output signals. The discrete time domain equations of the first and the second order loops are built and solved to determine the stability conditions. The pull-in ranges are examined numerically. The simulations are done in MATLAB, and it is shown that the linear range extension results in an extended pull-in range in both cases, but the initial condition of the loop filter affects the extended pull-in range for the second order loop.