Optimal Selection of Power Semiconductor Technology for On-board Charger (OBC) Applications and Experimental Verification for a 2.5 kW Classical

The on-board charger application is diverse with a variety of topologies, power levels, battery voltage levels, number of phases and switching frequencies, and each system designer has several degrees of freedom to optimize the system. There are several power semiconductor technologies available, with their own merits and demerits, and there is not one solution that fits all. Not only is it challenging, but often puzzling, for system designers to choose the right power semiconductor technology. In order to solve this dilemma, this paper presents hints for optimal selection of power semiconductors for On Board Charger (OBC) applications. The power loss performance of various technologies available in the market, such as Silicon (Si) IGBT, Si Super-junction Mosfet, Silicon Carbide (SiC) Schottky Diode, SiC Planar Mosfet and SiC Trench Mosfet are experimentally compared. A behavioral power loss model is introduced which not only includes the dependency of the losses on the current, working voltage and temperature, but also on the gate voltage, gate resistance and the chip areas. Moreover, this model is capable of segregating the system-level power losses into their root causes such as tail currents, forward recovery, reverse recovery etc. This model is used to compare the efficiency performance for a classical boost PFC topology and provide hints on selection of the optimal power semiconductor technology. Experimental validation is performed by measuring the power losses in a classical boost topology, and different technologies from several vendors are compared. It is shown that the replacement of the Si diode in IGBT-based OBC solutions, with a SiC diode could help reduce the semiconductor power losses by up to 40%, whereas using a super-junction Mosfet can help reduce the losses by up to 50%. Using a SiC Mosfet as the switch enables the highest reduction of around 60%.