Comparative Analysis of Leakage Power in 18nm 7T and 8T SRAM cell Implemented with SVL Technique

The major constraint in present days in system design is power dissipation, there are two types of power dissipation Dynamic and static power. In the present day level of technology scaling static power in a predominant problem compared to the Dynamic power which was a source of power dissipation previously. When the device is in OFF state the power dissipated is Static power. As the technology is scaled further thesis is a possibility for the increase of static power. In future generations the half of the total power will be contributed by leakage power. SRAMs are used in high performance applications and they occupy major part of the circuit. In this paper different leakage reduction technique are proposed along with different SRAM technologies. Here a comparison of leakage power is done between 6T SRAM and 7T SRAM based on FinFET technology. The proposed 7TSRAM has better performance and low leakage power compared to both traditional 6T SRAMcell and 8T FinFET based SRAM cell.