Study on Advanced Substrate for Double-side Package to Reduce Module Size

Recently, 5G and AI are driving the electronic devices to require high-performance computing and high-speed transmission. To support emergence of high speed 5G smartphone in mobile sector, the number of components is trending significantly upward. Technical approach for modularization is becoming critical importance due to a space constraint in mobile device. This research presents a substrate structure and technical method that enables a double-side package structure as a way to improve density of the part. Double-side package enables module size reduction by mounting the device not only on the top side (component side) but also on the bottom side (solder side). In this study, it was to enable flip chip bonding device of more than 100μm thickness by forming an independent pattern in cavity and fine I/O formation less than 400μm by forming a via and pad through the cavity layer. In order to reduce the shrinkage stress generated during the formation of the dielectric layer of the cavity structure, fabrication conditions and material change experiments were conducted. As a result, the warpage of the fabricated substrate was improved, and the module size was reduced by 30% compared to the normal substrate by implementing the cavity structure. After package assembly using our substrates passed standard reliability test, including thermal cycle, un-bias HAST, drop test and accelerated life test.