Network-on-Chip Application Mapping Using Genetic Algorithm for a Complex hardware implementation of Video encoders

Hardware implementation is necessary and important for several applications and in the case of video encoders and that in order to ensure real time processing. The integration of these applications into a SoC, based on one or more processor, is one of proposed solutions. The use of a SoC implies the utilization of adequate communication system. The Network-on-Chip is the new communication system proposed for new applications. In addition to the technical characteristics of NoC, the mapping problem is one of important problems that influence on the global characteristics of the application. This work presents a mapping methodology based on genetic algorithms proposed especially for mapping IP cores of the H264 encoder onto mesh-NoC tiles. The main objective is to minimize the total network power of the implemented application. Simulation results confirm that the proposed model is very efficient and optimized the video encoder application in both of the time and energy side.