A High-Speed Moving Average Integrator in Silicon Photonics for TIA-Less Receivers

A high-speed moving average integrator in silicon photonics is demonstrated. The integrator is monolithically fabricated with an optical receiver front-end operating at 1550 nm. The design consists of an optical splitter, an optical low-loss delay line to implement a 400 ps delay between the two received bit streams, two SiGe photodiodes, and a 200 fF capacitor. The proposed moving average structure can perform four-bit integration at 10 Gbps. The resulting signal at the output of the integrator is the moving average of the received bit streams. The moving average integrator is validated through measurements and simulations at 2.5 and 5 Gbps. The proposed structure facilitates the development of next generation cost-effective and energy-efficient optical transceivers by exploiting optical time delay and moving average operation in silicon photonics. This mitigates the need for multiple clock phase generation and trans-impedance amplification on the electronic chip.