Charge-assisted Recovery and Degradation in Charge-trapping 3D NAND Flash Memory, Experimental Evidences and Theoretical Perspectives

In this work, high temperature (HT) baking impacts on the charge-trap (CT) type 3D NAND flash memory are studied systematically. It is found that HT baking impacts are directly correlated to cell states. On the one side, memory cells can be partly recovered when baking at the erase state while serious degradations occur when baking at the program state. Specially, after 2k Program/Erase (P/E) cycling in TLC 3D NAND chip, ~25% error bits can be cured by HT baking after cells’ programming. To study the underlying mechanisms, theoretial investigations are done by the first principle calculations, indicating that charge impacts are weak on the defects at the interface but effective to modulate the defect trap levels in the tunneling oxide. It is concluded that electrons de-trapping from charged Vo defects make Vo defects inactive and "cure" the tunneling oxide. However, electrons accumulation will not only inhibit electrons detrapping but also assist electrons charging to the neutral Vo defects, which "generate" more active Vo defects and cause the degradation.