Low-thermal-resistance flip-chip fine package for 1-W voltage regulator IC

A low-thermal-resistance flip-chip fine package (FFP) for a voltage regulator IC is described. This FFP is a chip size package (CSP) developed for low-pin-count ICs. It consists of an alumina ceramic substrate, flip-chip bonded ICs and underfill resin. The thermal conductivity of the alumina ceramic substrate is about 50 times greater than that of the resin used in conventional plastic mold packages. The thermal path from the heat source in the IC chip to the substrate is very short because the IC, which has Au bumps, is flip-chip bonded to the metal pattern on the ceramic substrate. This offers superior thermal resistance to that in conventional plastic mold packages. The finite element method (FEM) was used to simulate the thermal resistance reduction effects of varying the substrate size and material, the copper-pattern area and the via holes on the printed circuit board (PCB). An actual thermal resistance of 130/spl deg/C/W (0.96 W power dissipation at T/sub j/=150/spl deg/C) was observed in a 3.0/spl times/3.0/spl times/0.65 mm FFP mounted on a 6/spl times/10 mm copper-pattern PCB. This value is almost the same as that arrived at in simulations, and that of To-252, a conventional plastic mold package.