Design of random equivalent sampling control module based on FPGA

With the rapid development of electronic science and technology, the signal frequency that engineers need to measure becomes higher and higher. Limited by the analog-to-digital converter (ADC) sampling rate and Nyquist sampling theorem, the digital oscilloscope can only measure waveform in a very limited range of frequency in real-time sampling mode. Therefore, it is necessary to introduce an equivalent sampling technique to increase the ability of the oscilloscope to measure higher frequency signals. In this paper, a random equivalent sampling reconstruction method based on field programmable gate array (FPGA) is proposed. In the random equivalent sampling mode, multiple sets of samples collected by the ΔDC are buffered in the FPGA, and the stretched circuit measures the time interval Δt between each set of trigger signals and the rising edge of the first sampling clock. Through these samples as well as the At in each group, the waveform can be reconstructed in FPGA, and then this reconstructed waveform can be read and displayed by the upper computer. The waveform refreshing rate of the random equivalent sampling can be greatly improved by this kind of reconstruction inside a FPGA.