A Flexible Debugger for a RISC-V Based 32-bit System-on-Chip

Complex system-on-chip (SoC) demands to integrate debugging systems to control and monitor the internal behavior for post-silicon testing. Debugging systems must not only provide run-control and observability; they must also allow analyzing the operations performed within the SoC. The analysis capability must be non-intrusive with a flexible filtering option, followed by an analysis performing stage. Although some reported works address debugging methods to perform control and observability, details about how to monitor and to analyze SoC activity are scarce. Here, we propose a debugging platform for post-silicon. This work reports experimental measurements performed to the platform implementations in silicon and FPGA, validating the proposed debugging features. The debugging platform was implemented into a full SoC with a 32-bit RISC-V based core, an AHB bus, an APB bus, and peripherals. The SoC was fabricated in a general-purpose 0.18μm CMOS technology, where the debugging platform occupies 5.8% of the total SoC area.