A BMC Analog/Digital PHY for Type-C USB Power Delivery Chip in 0.14 μm CMOS Technology

A type-C BMC transceiver in 0.14 μm CMOS technology is presented. The analog PHY in combination with digital PHY supports BMC (Biphase Mark Coding) data for USB PD (Power Delivery) negotiation trough a Type-C cable. It compensates signal levels loss and duty cycle distortion due to ground shifting at two sides of Type-C cable. Analog receiver includes a BMC squelch detector, decision maker comparators and duty cycle correction circuit. Analog transmitter includes slew rate control circuit and linear line driver. Digital PHY makes more correction on duty cycle in receive side and sends BMC codded data for transmitter. Analog transceiver which is connected to connector facing high voltage pins are protected against high voltage surge. Receiver consumes 0.2 mA of current under 3V supply and transmitter consumes 1.7 mA of current to drive a 50-ohm/1-nF load. Total area of receiver and transmitter with all supporting circuits and high voltage switches is 0.4 mm². The implemented transceiver is in compliance with USBPD and type-C standards with respect to all required parameters.