A Novel Architecture Of AVS2 Intra Prediction

AVS2 is the latest generation of video coding standard independently developed by China. In this paper a parallel hardware structure of ASIC for AVS2 intra prediction encoding is proposed. This architecture is analyzed by the algorithm and take advantage of the ASIC parallelism. We put several modules together, including DC, Planar, Horizontal, Vertical, and Angular prediction hardware. And we used them to parallel processing and calculate the SATD. Due to the utilization of Sobel operator to obtain the gradient of the current PU, and we design a new structure for calculating the gradient. After logic synthesis using the SMIC 28nm standard cell library, simulation results show that the proposed architecture of intra prediction for 300MHz, real-time processing $1920\times 1080$@60fps sequence of images, extremely suit for VLSI HD encoder.