Controlling L-BTBT in the Ultra-short channel Nanowire Junctionless Accumulation FETs using Overlapping Gate-on- Drain

Nanowire Junctionless Accumulation mode FETs (NW JAMFETs) offer an increased drive current compared to the conventional junctionless FETs. However, an enhanced lateral band to band tunneling (L-BTBT) originated OFF-state leakage current restricts the scaling of NW JAMFETs. Therefore, in this paper, we demonstrate the use of an overlapping gate-on-drain in ultra-short channel NW JAMFETs to reduce the L-BTBT component of the gate induced drain leakage (GIDL) without any degradation in the ON-state drive current. Our well-calibrated 3-D simulation results show that overlapping the gate on drain increases the tunneling width at the channel-drain interface reducing the OFF-state current by two orders of magnitude and increasing the ON-state to OFF-state current ratio (Io_N/I_oFF) of the NW JAMFETs to ~10⁶ for a channel length of 20 nm. Moreover, the gate-drain overlap effectively suppresses the L-BTBT even for a channel length of 7 nm leading to the leakage current reduction by two orders of magnitude in the OFF-state. Thus, our proposed approach can improve the potential performance of the NW JAMFETs for the sub-10-nm technology nodes.