Low Power and Area Optimized Architecture for OQPSK Modulator

Low power modulators are most efficient for wireless communication; the conventional OQPSK modulator consumes more power and area. In this work, OQPSK modulator is reframed with booth multiplier, this multiplier consumes minimum power and area than the conventional OQPSK modulator. Cadence software is used for the simulation and synthesis, the power reduction in 180nm, 90nm and 45nm is 31%, 26% and 23% and 23% and area reduction is 16%, 15.32% and 16.26% respectively.