A Novel Binary to Ternary Converter using Double Pass-Transistor Logic

The ternary circuit has an advantage over the binary circuit concerning interconnect complexity, propagation delay, and energy consumption. This paper proposes a novel binary-to-ternary converter using Double Pass-Transistor (DPL) with four bits as input and three trits as output. The importance of this work is gained through its potential to increase the data rate, and reduce power consumption. Also, the proposed converter can be used as a bridge between binary and ternary circuits. The proposed circuit is simulated and tested using the Micro-Cap V10 PSPICE simulator with CMOS process technology. It is then compared to different binary-to-ternary converters to conclude that significant improvement achieved.