Power Delivery Network Step Load Response and 1st Droop Formulation

Power integrity design has been a challenging task especially with devices that high in power consumption but require high performance and with very tight voltage budgeting. Most of the time, the solution space is also limited by the product cost target. Designer will need to validate the power delivery network (PDN) performance with various design operation activities to identify the worst-case current profile. Step load current is one of the common profiles that is used to verify the PDN dynamic noise against the voltage specification. This paper introduces a formulation to estimate the PDN transient response to the step load current profile and the induced 1st droop voltage noise. It provides a quantitative model to analyze the PDN characteristic and its response with different step load bandwidth profile. PDN bandwidth metric is also introduced in the formulation to study the relationship with the step load bandwidth. The PDN step load response will be separated to resistive and reactive impedance response and as well the ripple from the LC oscillation. This serves as the dynamic voltage budgeting methodology with respect to 1st droop event to quantify the IR drop and ripple voltage noise budget across board, package and die to meet the product voltage specification.