FPGA Based Emulator Design of a DC Motor

Hardware emulator is a special purpose device which mirrors the operation of a software or dynamic system. Such devices can be implemented using Programmable Logic Devices, Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit(ASIC). Field Programmable Gate Array (FPGA) is one of the popular solutions to design an emulator due to its high speed, reduced power consumption, reconfigurability and reduced cost. It is more flexible than a PLD and has less development time when compared to ASIC. In this paper, hardware realization of DC motor emulator using FPGA is presented. The continuous-time transfer function model of an armature controlled DC shunt motor is determined by conducting suitable experiments. The discrete-time model of the DC motor is the emulator and it is realized as a second order digital Impulse Infinite Response (IIR) filter. The hardware of this filter is designed with adders, multipliers and delays using Verilog and mapped on a Spartan 6 FPGA. Speed and load characteristics of this emulator is compared with the actual motor characteristics. This model can be used in place of DC motor for testing speed estimators and for verifying the performance of motors with different ratings without using the actual motors.