Performance Analysis Of Decoupling DC-Link Capacitors For A SiC-MOSFET-Inverter Module

This paper investigates the voltage stabilization and thus the switching performance in relation to the placement of an auxiliary DC-Link “decoupling” capacitor. Additionally, the transient switching behavior of a SiC-MOSFET-module and its overall system loss are presented. This paper compares two approaches: a SiC-MOSFET-module with an embedded decoupling capacitor and the utilization of a decoupling capacitor placed directly at the input pins of the SiC-module. The decoupling capacitor divides the main current commutation loop into two new LC-circuits. The placement of the capacitor is strongly influenced by the inductance ratio between the new LC-circuits as well as the physical size limits of the capacitor and therefore the nominal capacitance itself. The stray inductance and the capacitance of each LC-circuit have a direct influence on the overshoot voltage and the system losses. Based on a 1200V and 600A SiC-module inverter setup and its SPICE model, the influence of both approaches will be evaluated in theory and validated with measurements.