An Asynchronous AER Circuits with Rotation Priority Tree Arbiter for Neuromorphic Hardware with Analog Neuron

At present, the neuromorphic hardware with analog neuron is widely studied by researchers. Address event representation (AER) is an event protocol, which usually used for inter-chip communication between neuromorphic chips. Fixed priority arbiter often results in unfair allocation of bus resource to only the high priority neuron, thus introducing fixed noise in the neural network. In this paper, we propose an asynchronous AER circuits with rotation priority tree arbiter to alleviate this issue. Moreover, to match the different delay between AER's handshake signal and neuron's handshake signal, a special handshake circuits is designed. Simulation results show that the 64 channels AER circuits can perform up to 143M event/s. The design is designed with SMIC180 process for fabricating RRAM based neuromorphic chip.