Virtual Platform for Architecture Exploration of Serial Communication in MPSoC Devices

There are many benefits to using a virtual platform in designing a system, network structure, or even an MPSoC. Besides the challenges of designing one device of MPSoC, a virtual platform can be also use for designing a system that may have a number of MPSoC's intercommunicating in a network. Generally, the designer has to wait for the real hardware prototype to analyze the architecture or verify the complex system design. Real prototype takes too much time to be ready. The cost will also be prohibitive just to experiments with different architectures and various functional features. With the virtual platform, it allows the designer to study and decide which architecture that work the best for their purpose in the early stages of the design phase. A virtual platform has been built for a single MPSoC using an adaptive network-on-chip (NoC). It also includes the standard serial communication modules such as SPI, I2C, and UART. This paper presents the serial communication implementation as a case study to illustrate the virtual platform capability in architecture exploration for multiple MPSoC devices. With the emphasis on building fast models, the detail of the clock drivers and pin-level signaling are not taken into consideration.