A Low-Noise, Low-Power, and Chopper-Stabilized, Current-Feedback Instrumentation Amplifier for Current Sensing Application

This paper presents a low-noise, low-power, and chopper-stabilized current-feedback instrumentation amplifier (CFIA) for current sensing application. To achieve high common-mode-rejection ration (CMRR), the CFIA employs a three-stage topology with nested-Miller compensation. Through chopping both the input and intermediate stages of the amplifier, an input-referred noise power spectral density (PSD) of 22.7 nV/$\sqrt{}$Hz is achieved at 3 mHz. To reduce chopper ripple, the amplifier employs a continuous time AC-coupled ripple reduction loop. The proposed amplifier is implemented in a SMIC 0.18-$\mu$m CMOS process, the CFIA shows a simulated CMRR of 130 dB at a supply voltage of 3.3 V with a current of 200 $\mu$A.