Building An Open Source Linux Computing System On RISC-V

As is commonly known, hardware in a computer system requires a processor to run the operating system. The primary architectures that form the basis of most processors are CISC and RISC. CISC includes long sub-level commands for effective memory management and simple compiler implementations to be developed. Thus CISC has a complex set of commands; hence the name Complex Instruction Set Computer. On the other hand, CISC has had backward compatibility since the 1970s. Reduced Instruction Set Computer (RISC), the other popular architecture, simplifies command sets and handles access to memory with load-store commands. Since the instruction set is simplified, the hardware runs faster. In addition, RISC-based processors contain less chip-sets and may be designed faster. Currently, with the prevalence of the Internet of Things (IoT), the demand for RISC architectures has increased and its usage in embedded devices has become widespread. The ARM processor is a successful example of the RISC architecture adaptation. However, ARM processor production has certain license term limitations and contains a few design flaws in its architecture [1]. In 2010, the RISC-V processor architecture, which was developed as an open source instruction set at Berkeley University, paves the way for open source hardware in terms of its BSD license and design professionalism. As a result, it will be possible to produce their own processors for communities and organizations without license restrictions. In this paper, we discuss the building blocks of the development life-cycle of an open source operating system on the RISC-V architecture. As an operating system base, we implement MILIS Linux, an open source operating system development project. It has an independent user space and its own package manager. For a completely independent open source computing system, open source RISC-V hardware architecture provides the freedom that is needed.