Notice of Violation of IEEE Publication Principles: Efficient Segmented Region Section Code for Error Detection & Correction in Memories for Space Applications

Notice of Violation of IEEE Publication Principles

“Efficient Segmented Region Section Code for Error Detection & Correction in Memories for Space Applications”
by G. Barkavi and P. Banupriya
in the Proceedings of the International Conference on Intelligent Techniques in Control, Optimization and Signal Processing (INCOS), April 2019

After careful and considered review of the content and authorship of this paper by a duly constituted expert committee, this paper has been found to be in violation of IEEE’s Publication Principles.

This paper copies figures and equations from the paper cited below. The original content was copied without attribution (including appropriate references to the original author(s) and/or paper title) and without permission.

“An Efficient, Low-Cost ECC Approach for Critical-Application Memories” by Felipe Silva, Walter Freitas, Jarbas Silveira, Otávio Lima, Fabian Vargas and César Marcon in the Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, August 2017, pp. 198–203


Unwavering quality is an essential necessity for space applications. Different cell upsets incited by ionizing radiation. It’s are fetching also imaginable due to the constant technology scaling down. Error correction codes concern for retake the save information into its actual state providing certain computer systems. Accordingly, the likelihood of single cell upsets (SCUs) increases. Substitute the primary drivers are several cell upset in infinite radiation. The utilization of mistake adjustment codes (ECCs) with cutting edge remedy capacity is a typical framework level procedure to solidify the memory against numerous piece upsets (MBUs).CLC uses expanded hamming and equality in a network design like grid code. Although, CLC uses many lay-off bits and a higher advance algorithm for rectify and identify multiplex MCU patterns. This project presents the usage and assessment of Data Segmentation Section Code (DSSC).When data is send to the sender the data will be arranged by the segmented region. The data will be separated by the row and column, divide in the region wise. Data Segmentation Section Code able to correct MCUs with increase the error detection and correction capacity and then reduced area, delay overheads and complexity. Proposed system has been codified using Xilinx ISE 12.1 simulation.