FPGA Implementation of Power Quality Improvement Strategy for MLI

The paper develops a pulse width modulation (PWM) approach for lowering the total harmonic distortion (THD) and increasing the fundamental component of the output voltage of single phase multilevel inverter (MLI). The significance of the use of MLI orients to synthesize the output with a better power quality. The number of level increase its serves to extract a nearly sinusoidal output voltage of the chosen amplitude. The MLI comprises of a H- bridge MLI inverter, eight power switches and four capacitor voltage dividers. The control signals that evolve from comparing the individual sinusoidal references with the triangular carrier enable controlling the switches. The schemes involve experimentally evaluating the performance using an appropriate prototype over a range of operating loads.