Generation of Test Vectors for Test Systems of Electronic Modules

The relevance of the topic is to provide the solution to the problems of creating equipment for test systems of complex electronic products. The goal is to ensure the efficiency test vectors generation devices during the testing of large and extra large integrated circuits. The task is to optimize the generation algorithm according to the criteria of test sequence maximum length and minimum hardware costs. The task of constructing a flowchart for the algorithm of generating the test vectors for creating periodic and irregular test actions is solved (with the test systems operating in a wide frequency range). The result is a structure that combines the generator of test vectors with multiplexing into one channel, which allows implementing a test sequence of up to 1 GHz. Conclusions indicate that the proposed configuration is a compromise between the minimum memory size with long test sequences and fast reloading of the channel without interruption in generation.