Mixed Multilevel Inverter Topology for High Power Medium Voltage Applications

In this paper, a mixed multilevel inverter scheme for high power, median voltage (HPMV) application is proposed. The major contribution of this work is an implementation of Diode clamped H-Bridge (DC/H-Bridge) inverter topology which is a fusion of diode clamped & cascaded H-bridge inverter. The fundamental challenges in applying the inverter topology were high device switching frequency which causes high power loss and excessive heating of switches (IGBT/GTO) and harmonics are present in output. Our research is to reduce switching frequency of devices without hampering the inverter switching frequency. This helps to overcome the two major drawbacks of conventional inverter topologies. A SPWM scheme is used. An inductor filter (L-filter) is used to remove harmonic content present in the inverter output.