Accelerator Implementation of Lenet-5 Convolution Neural Network Based on FPGA with HLS

Convolution neural network is widely used in image recognition because it can imitate the behavioral characteristics of biological visual nerve, and has high recognition accuracy. It is a kind of feed forward neural network which contains convolution computation and has deep structure. Also it is one of the representative algorithms of deep learning. Because the convolution neural network has a special calculation mode, the general processor is not high in the implementation efficiency of the convolution neural network and can not meet the performance requirements. In order to solve this problem, we implement convolution neural network on FPGA and optimize convolution operation to improve computing parallelism, data throughput and energy efficiency of traditional processors. Finally, we implemented the convolution neural network of the Lenet-5 model on the ZYBOZ7 FPGA board and compared it with traditional processor. We realized the fast recognition of a picture at the frequency of 100M Hz with DMA control. The data throughput of FPGA is more than four times higher than that of general processor., and the power consumption is 1.8W, which is much lower than that of general processor.