A High Speed and Low Power 32nm FinFET Dynamic Latch Comparator Design

A comparator establishes the bridge to connect the realms of digital and analog circuits. Moreover, the need to fulfil the consistent demand of low power and high speed small-scale devices has brought the MOS transistor based circuit design near to the edge of feasible design limit. In recent times, with the advancement in fabrication technology, FinFET has emerged as the most competent alternative with the prospective to overcome the short channel effect challenges of MOSFET. In this paper, we have presented a dynamic latch comparator circuit using 32nm PTM model of FinFET and performed our simulations with LTspice and MATLAB. Our designed comparator has shown an impressive propagation delay time of only 7.25 ps and average power consumption of 45.64 μW at 0.8V dc supply and 2.5 GHz operating frequency. Also, its performance comparisons with other contemporary designs verified the supremacy of our proposed comparator. Moreover, it seems that in the upcoming years, FinFET has the potential to bring forth radical transformation in device modeling and supersede conventional MOSFET oriented design.