Formalizing Time4sys using parametric timed automata

Critical real-time systems must be verified to avoid the risk of dramatic consequences in case of failure. Thales developed an open formalism "Time4Sys" to model real-time systems, with expressive features such as periodic or sporadic tasks, task dependencies, distributed systems, etc. However, Time4Sys does not natively allow for a formal reasoning. In this work, we present a translation from Time4Sys to (parametric) timed automata, so as to allow for a formal verification.