WBG Partial Power Processing: A New PFC Design with Interleaved MHz-Frequency GaN and Low-Frequency Si Phases

WBG power semiconductors offer lower switching loss and higher power density than silicon but suffer from significantly higher cost. In this paper, we introduce a WBG Partial Power Processing (P³) design concept in which WBG devices are judiciously used to process only a fraction of the total power at a high frequency while silicon devices process the base power at a low frequency. The mixed use of WBG and Si delivers the same WBG benefits but at a much lower cost. A 2.1kW boost PFC converter based on this design principle is reported that comprises two interleaved Si and GaN phases. We develop a new control strategy to allow the based power processed efficiently by the Si phase switching at a low switching frequency of 10kHz while the GaN phase is used as a MHz-frequency active filter to minimize harmonics. The PFC prototype exhibits a peak efficiency of 97.98% and a power factor of 0.99 even with a frontend diode bridge. The new P³ PFC is validated by simulation and experimentally to achieve excellent efficiency, power density, and harmonics at a cost much lower than a full WBG design.