Design of packet-fair queuing schedulers in router

Implementing a packet scheduling mechanism in next generation routers has become a central issue for providing networking-level QoS guarantees to a large number of sessions. In this paper, we present an effective improved design of a packet-fair queuing scheduler based on discrete backlogged rates and packet lengths. We also provide a new technology for timestamp reconstruction which can effectively decrease the necessary storage space of timestamps without introducing any ambiguity in comparison operations.