Smart FPGA-based System for Enhancing Educational Programs

This paper proposes a system to enhance the classroom experience. The system is based on having an FPGA in every classroom. This FPGA performs facial recognition to take attendance. It also analyzes the video stream to report on participation and attention and to detect violence. In addition, the system processes readings from different sensors to adjust the class environment for enhancing the learning experience. All classrooms are connected together and to the principal’s office. Reports are sent daily from the school to the district. Next, fault tolerance is studied at the FPGA level. It is shown how to tolerate the failure of an FPGA and still have the system operate normally till this failure can be repaired (which may take a relatively long time in developing countries). Fault-free and faulty scenarios are simulated on Riverbed Modeler and results prove that the system is operating correctly and that the delays are acceptable.