Optimizing Inductorless Static CML Frequency Dividers up to 23GHz Output Using 45nm CMOS PD-SOI

Two mmWave frequency dividers were designed, manufactured and measured using static current mode logic divider topology on 45nm CMOS PD-SOI technology. Dividers differ by flip-flop load, first divider uses resistive loads and second divider active PMOS loads. Achieved output referred frequency ranges cover 13-22GHz on the first divider and 8-23GHz on the second divider. Both dividers occupy small areas of $0.002\mathrm{mm}^{2}$ and $0.0017\mathrm{mm}^{2}$ respectively and dissipate only 10.3mW and 11mW from 1V supply. The broad tuning range, moderate speed, small area and I/Q output phases make this divider architecture an attractive option for sliding-IF transceiver topologies operating up to 69GHz carrier frequency and enable operation of PLL's up to 46GHz.