Design and Implementation of BIST logic for ALU on FPGA

Field programmable gate arrays (FPGAs) are the reconfigurable logic devices which are widely used in many applications like system prototyping, complex computing systems, automotive electronics and mobile devices. FPGAs have become very popular at present because of their features like high logic capacity, reconfigurability and regular structure with less area cost. However, increase in density and complexity also has resulted in more probability of faults. There is a necessity for fault detection to ensure that system gives the output as expected. Arithmetic logic unit is an essential subsystem block found in almost all digital computing systems. Since the main computational tasks are performed by ALU, it has to be reliable. In this paper an attempt is made to illustrate reconfigurable Built-in self-test (BIST) logic which detects faults across the ALU block mapped on the FPGA. BIST is a fault detection technique that allows a circuit to test itself. Proposed work aims at detecting stuck-at faults occurring at the internal blocks of ALU. Test patterns are generated through LFSR and outputs are analyzed using MISR block. Through this proposed work an effort is made to verify the design also using Questasim simulator. The design is been executed using XILINX Vivado IDE. Number of faults detected is 80 out of 98 with code coverage of 94.2% and the total power consumed by the proposed design is 1.06 watts.