Variation-Aware Prediction of Circuit Performance in Near-Threshold Regime Using Supply-Independent Transition Threshold Points

Due to the highly variation-prone nature of the near-threshold voltage (NTV) circuits, it is critical to have design and performance models that consider process, voltage, and temperature (PVT) variations. However, in the NTV regime, the existing timing models are based on arbitrarily chosen VDD-dependent threshold points for effective current calculation that results in unreliability. In this article, an effective current delay model for an inverter operating in NTV regime is presented using supply-independent threshold points. The model is developed considering the input-output coupling capacitance and by relating the input and output currents of an inverter stage. This approach is physics-/topology-based and is valid for different technologies. This has been verified against HSPICE simulations and Synopsys Sentaurus 3-D technology computer-aided design (TCAD) simulations for STM 65-nm MOSFETs and 16-nm fin-shaped field-effect transistors (FinFETs), respectively, at different supply voltages, considering variation in threshold voltage and at different operating temperatures. The model predicts the transition delay values with an average (maximum) error of 3% (6%) and 4% (6%) for MOSFET and FinFET, respectively. Furthermore, the model is employed for digital buffer chain and single-ended ring oscillators (SEROs) for a wide range of supply voltages. Finally, we show an application of the model to calculate the change in the oscillation frequency of SERO with PVT variations and compare the same with the time-consuming Monte Carlo simulations.