A Design Approach for a Low Cost Phasor Measurement Unit

Phasor Measurement Units (PMUs) are playing more and more a crucial role for the development of the “smartness” of power systems. In order to be efficiently used for the smart management of the power systems, a widespread diffusion of PMUs is a becoming a need. However, PMU with accuracy compliant to the standard IEEE C37.118.1 2011 and its amendment IEEE C37.118.1a 2014 have typically costs that constitute a brake for their diffusion. Therefore, in this paper, a design approach for a low-cost implementation of a PMU is presented. The low cost approach is followed in the design of all the building blocks of the PMU, i.e. the analog input stage, the synchronization stage and the processing and communication stages. A key feature of the presented approach is that the data acquisition, data processing and data communication are integrated in a single low cost microcontroller. In addition, the synchronization is obtained using a simple external GPS receiver, which does not provide a disciplined clock. The synchronization of sampling frequency, and thus of the measurement, to the Universal Time Coordinated is obtained by means of a suitable signal processing technique. For this implementation, the Interpolated Discrete Fourier Transform has been used as the synchrophasor estimation algorithm. Some experimental tests in stationary conditions, with frequency offsets and harmonics, are discussed.