Server CPU Package Design Using PoINT Architecture

The package serves as the space transformer between the fine pitch Silicon bumps and the slowly scaling board pins. Over the last few years we have witnessed ~20% CAGR of IO pins driven by performance needs. This leads to the ratio of space transformation to be quite high and introduces multiple challenges. A novel package architecture called PoINT (Patch on Interposer) is used on Intel server CPUs which helps with on-package integration and provide the most optimal performance at the lowest cost. PoINT uses 2 substrates-a HDI substrate that interfaces with the die and an LDI substrate that interfaces with the board. The 2 substrates are interconnected using a Mid-Level Interconnect (MLI). In the paper we illustrate the design requirements and challenges and the interaction of various multi-physics aspects that need co-optimisation to make this architecture successful.