Artificial Neural Networks as an Alternative for Automatic Analog IC Placement

In this paper, an exploratory research using artificial neural networks (ANNs) is conducted to automate the placement task of analog IC layout design. The proposed methodology abstracts the need to explicitly deal with topological constraints by learning reusable design patterns from validated legacy layout designs. The ANNs are trained on a dataset of an analog amplifier containing thousands of placement solutions for 12 different and conflicting layout styles/guidelines, and, used to output different placement alternatives, for sizing solutions outside the training set, at pushbutton speed. Ultimately, the methodology can offer the opportunity to reuse all the existent legacy layout information, either generated by layout designers or EDA tools.