Challenges in the Path Toward a Scalable Silicon Photonics Implementation of Deep Neural Networks

The wide utility provided by the computational algorithms known as “deep learning” (or artificial neural networks) has prompted the development of specialized (electronic) hardware that can efficiently meet the speed and energy requirements that they demand. In the last few years, several proposals have also been made to build integrated photonic platforms to implement these algorithms by harnessing the light's ability to efficiently perform several kinds of computational operations with low latency times and low power consumption. In this work, we present a proposal of a photonic device that is designed to implement one basic deep learning architecture, the multilayer perceptron, which consists of the sequential application of matrix-vector multiplications and element-wise nonlinear functions. We analyze how the speed and energy efficiency performance metrics, as well as system requirements, scale with the number of nodes in the layers of the network. Finally, we discuss the possible routes that may enable the implementation of larger networks, which opens a wide variety of research paths that can contribute to the creation of more scalable and applicable photonic devices.