Linearized Low Noise Amplifier by Post Distortion Technique

A linearized low noise amplifier (LNA) in 180nm CMOS process is proposed. By employing an auxiliary PMOS transistor, the second and third order nonlinear currents of resistive shunt feedback LNA can be cancelled. By the second-order chebyshev filter, wide band input matching can be provided. The IIP
₃
and IIP
₂
of the circuit are improved in average 10 dB and 8 dB in the broad band-width, respectively. Maximum power gain of 21 dB and minimum noise figure of 2 dB are attained at 4.5 GHz. The proposed LNA consumes 10 mW under a 1.8 V power supply.