Performance Enhanced Unsymmetrical FinFET and its Applications

A steep subthershold slope novel usymmetrical FinFET is proposed for gate lenght 9nm with improved performance in terms of I
_on
/I
_off
ratio in comparison to existing symmetrical structure. Proformance is furture optimised in terms of doping variations and under lap behaviour of FinFET. High-K dielectric material oxide and metal gate contact of high work function incorporated and performance compared. pFinFET and nFinFET both simulated togather to obtain ideal characteristics required to match in CMOS technology. 2D/3D Visual TCAD device simulator utilised in design of all FinFET structures.