Design of General Purpose Microprocessor with an Improved Performance Self-Sleep Circuit

As the technology advances leakage power is a major concern to be addressed. MTCMOS technique has been the finest technique to decrease significant power in standby mode, giving decent performance in active mode. MTCMOS entails additional design exertion to address the design challenges. An improved performance self-sleep circuit that avoids the necessity of distribution of sleep signal is presented. This circuit helps to simplify the implementation of MTCMOS sleep-wake up scheduling. This work goals the tests and intricacies associated to sleep signal distribution in a distributed MTCMOS design. The self-sleep circuit that consumes low power, occupies less area with less delay has been designed. In a 90nm technology, at 2-Giga Hertz clock frequency, the self-sleep circuit gives good performance in active mode and eliminates the sleep distribution network overheads, providing fast transitions between active to-standby-to-active modes.